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mmuecke vhdl [24 articles]

最近 mmuecke さんのライブラリに追加された論文の中から タグ vhdl. You can also see everyone's vhdl.
  • An FPGA-based VLIW processor with custom hardware execution
    (2005), pp. 107-117.
    by Alex K Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster
    posted to computer_architecture electronics_design_automation fpga high_level_synthesis reconfigurable_computing reconfigurable_platforms vhdl by mmuecke on 2008-04-10 09:46:03 as **
  • notes The Designer's Guide to VHDL
    (2001)
    by Peter J Ashenden
    posted to book vhdl by mmuecke on 2008-01-12 12:42:29 as read
  • notes Stream-Oriented FPGA Computing in the Streams-C High Level Language
    (2000)
    by Maya B Gokhale, Janice M Stone, Jeff Arnold, Mirek Kalinowski
    posted to compiler_design hdl hdl_tool high_level_synthesis parallel_programming vhdl by mmuecke on 2007-10-04 22:40:08 as ****
  • IEEE 1076.6-2004: VHDL Synthesis Coding Styles for the Future
    (2004)
    by Jim Lewis
    posted to vhdl by mmuecke on 2007-10-02 13:41:33 as **
  • IEEE standard VHDL language reference manual
    IEEE Std 1076-1987 (1988)
    posted to vhdl by mmuecke on 2007-06-04 19:15:36 as **
  • IEEE standard VHDL language reference manual.
    ANSI/IEEE Std 1076-1993 (1994), i.
    posted to vhdl by mmuecke on 2007-06-04 19:15:15 as **
  • 1076 IEEE Standard VHDL Language Reference Manual
    IEEE Std 1076-2002 (Revision of IEEE Std 1076, 2002 Edn) (2002), pp. 0_1-300.
    posted to vhdl by mmuecke on 2007-06-04 19:14:56 as **
  • IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis
    IEEE Std 1076.6-2004 (Revision of IEEE Std 1076.6-1999) (2004), pp. 0_1-112.
    posted to vhdl by mmuecke on 2007-06-04 19:11:53 as **
  • IEEE 1076.6-200X: VHDL Synthesis Coding Styles for the Future
    by Jim Lewis
    posted to vhdl by mmuecke on 2007-06-04 18:24:40 as **
  • Lessons in language design: cost/benefit analysis of VHDL features
    (1994), pp. 447-453.
    by Oz Levia, Serge Maginot, Jacques Rouillard
    posted to vhdl by mmuecke on 2007-06-04 18:06:04 as **
  • CHESS: A TOOL FOR CDFG EXTRACTION AND HIGH-LEVEL SYNTHESIS OF VLSI SYSTEMS
    (July 2003)
    by Ravi K Namballa
    posted to dfg hdl_tool high_level_synthesis vhdl by mmuecke on 2007-05-02 15:36:21 as **
  • notes The Quiny SystemC Front End: Self-Synthesising Designs
    (September 2006), pp. 135-142.
    by Thorsten Schubert, Wolfgang Nebel
    posted to hdl_tool systemc vhdl by mmuecke on 2007-04-30 13:52:55 as read
  • notes GAUT: An architectural synthesis tool for dedicated signal processors
    Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93. European (1993), pp. 14-19.
    by E Martin, O Sentieys, H Dubois, JL Philippe
    posted to dfg hdl_tool high_level_synthesis vhdl by mmuecke on 2007-04-27 14:14:16 as **
  • Functional synthesis of digital systems with TASS
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 13, No. 5. (1994), pp. 537-552.
    by S Amellal, B Kaminska
    posted to dfg high_level_synthesis vhdl by mmuecke on 2007-04-26 15:00:59 as **
  • From VHDL to efficient and first-time-right designs: a formal approach
    ACM Trans. Des. Autom. Electron. Syst., Vol. 1, No. 2. (April 1996), pp. 205-250.
    by Peter FA Middelhoek, Sreeranga P Rajan
    posted to dfg high_level_synthesis image_processing vhdl by mmuecke on 2007-04-26 14:46:47 as read
  • notes Bridging the domains of high-level and logic synthesis
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 21, No. 5. (2002), pp. 582-596.
    by RA Bergamaschi
    posted to dfg hdl high_level_synthesis survey vhdl by mmuecke on 2007-03-28 13:51:13 as **
  • notes Design and implementation of universal mathematical library supporting algorithm development for FPGA based systems in high energy physics experiments
    (2006)
    by Wojciech Jalmuzna
    posted to fixedpoint fpga fpgas_in_hep vhdl by mmuecke on 2007-03-21 11:25:53 as **
  • notes The LHCb DAQ interface board TELL1
    Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 560, No. 2. (10 May 2006), pp. 494-502.
    by G Haefeli, A Bay, A Gong, H Gong, M Muecke, N Neufeld, O Schneider
    posted to fpga high-performance_computing lhcb vhdl by mmuecke on 2007-02-22 17:16:31 as read
  • notes Hardware Description Languages: Concepts and Principles
    (1999)
    by Sumit K Ghosh
    posted to hdl vhdl by mmuecke on 2007-02-22 11:56:56 as read
  • notes Occam on Field-Programmable Gate Arrays - Optimising for Performance
    (2000), pp. 227-238.
    by Roger MA Peel, Barry
    posted to fpga high_level_synthesis image_processing parallel_programming vhdl by mmuecke on 2007-02-15 16:57:08 as **
  • Truly rapid prototyping requires high level synthesis
    Rapid System Prototyping, 1998. Proceedings. 1998 Ninth International Workshop on (1998), pp. 101-106.
    by G Doncev, M Leeser, S Tarafdar
    posted to fpga hdl high_level_synthesis vhdl by mmuecke on 2006-12-06 09:25:16 as *****
  • notes Control and data flow graph extraction for high-level synthesis
    VLSI, 2004. Proceedings. IEEE Computer society Annual Symposium on (2004), pp. 187-192.
    by R Namballa, N Ranganathan, A Ejnioui
    posted to dfg high_level_synthesis vhdl by mmuecke on 2006-11-23 17:15:17 as *****
  • C/VHDL codesign for LHCb VELO zero suppression algorithms
    Real Time Conference, 2005. 14th IEEE-NPSS (2005), pp. 156-157.
    by Manfred Muecke
    posted to confluence hdl lhcb vhdl by mmuecke on 2006-11-13 11:58:49 as read
  • A design flow for linear-phase fixed-point FIR filters: from the NPRM specifications to a VHDL code
    Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on, Vol. 4 (2003), pp. IV-277-IV-280 vol.4.
    by Chia-Yu Yao, Chin-Chih Yeh, Tsuan-Fan Lin, Hsin-Horng Chen, Chiang-Ju Chien
    posted to fixedpoint hdl vhdl by mmuecke on 2006-11-08 15:33:57 as **
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