A hardware implementation of realloc function

@article{citeulike:1133, abstract = {The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management. Object-oriented applications often generate higher memory intensity in the heap region. Thus, high-performance memory manager is needed to cope with such applications. As today's VLSI technology advances, it becomes more and more attractive to map basic software algorithms such as malloc(\ ), free(\ ), and realloc(\ ) into hardware. This paper presents a hardware design of realloc function that fully utilizes the advantage of combinational logic. There are two steps needed to complete a reallocation process: (a) try to reallocate on the original memory block and (b) if (a) failed, allocate another memory block and copy the contents of the original block to this new location. In our scheme, (a) can be done in constant time. For (b), the allocation of new memory block and the deallocation of original block are done in constant time. The hardware complexity of proposed scheme (i.e. X-unit, RS-unit, and ESG-unit) is O(n), where n represents the size of bit-map.}, author = {Srisa-An, Witawas and Dan, C. and Morris, J. }, citeulike-article-id = {1133}, doi = {http://dx.doi.org/10.1016/S0167-9260(99)00016-4}, journal = {Integration, the VLSI Journal}, keywords = {memory}, month = {January}, number = {2}, pages = {173--184}, posted-at = {2004-11-29 17:08:06}, title = {A hardware implementation of realloc function}, url = {http://dx.doi.org/10.1016/S0167-9260(99)00016-4}, volume = {28}, year = {1999} }

TY - JOUR ID - citeulike:1133 L3 - citeulike-article-id:1133 TI - A hardware implementation of realloc function JF - Integration, the VLSI Journal VL - 28 IS - 2 SP - 173 EP - 184 N2 - The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management. Object-oriented applications often generate higher memory intensity in the heap region. Thus, high-performance memory manager is needed to cope with such applications. As today's VLSI technology advances, it becomes more and more attractive to map basic software algorithms such as malloc( ), free( ), and realloc( ) into hardware. This paper presents a hardware design of realloc function that fully utilizes the advantage of combinational logic. There are two steps needed to complete a reallocation process: (a) try to reallocate on the original memory block and (b) if (a) failed, allocate another memory block and copy the contents of the original block to this new location. In our scheme, (a) can be done in constant time. For (b), the allocation of new memory block and the deallocation of original block are done in constant time. The hardware complexity of proposed scheme (i.e. X-unit, RS-unit, and ESG-unit) is O(n), where n represents the size of bit-map. KW - memory AU - Srisa-An, Witawas AU - Dan, C AU - Morris, J PY - 1999/01// UR - http://dx.doi.org/10.1016/S0167-9260(99)00016-4 ER -